Toward Hole-Spin Qubits in Si p-MOSFETs within a Planar CMOS Foundry Technology
Quantum computing is the manipulation of qubits. And a qubit is an abstract mathematical concept that can be reformed in countless physical formulations as per an experimentalist’s skills. One way is using electrically controlled semiconducting qubits via hole spins in semiconductor quantum dots. The motivation for the semiconducting quantum computing framework is scalability in terms of the qubit population. Superconductivity has seen immense progress in terms of qubit control and readout, however, extending its architecture to thousands and millions of qubits, some think, is extremely difficult. On the other hand, semiconducting architectures, especially semiconducting quantum processors, operate on the nanometer scale; this is much more easily scalable, and some researchers think is the future of many-qubit quantum computing.
In this paper, written by a professor and Ph.D. student from our very own UofT ECE department, a multiscale approach to simulate a hole-spin qubit in a down-scaled Silicon channel p-MOSFET is demonstrated. Their calculations show the formation of well-defined hole quantum dots within the Silicon channel paving way for possible general electrical control; this was confirmed by implementing Rabi frequencies of the order of 100 MHz. (Rabi frequencies refer to the coherent oscillation of a qubit between the states |0> and |1> or between a preferred ground state and an excited state). Lastly, this paper’s results demonstrate the possibility of an all-electrical manipulation of hole-spin qubits within a FDSOI (Fully Depleted Silicon on Insulator) technology.